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FAQ- HMC Board Layout

Board Layout

Is it better to layout a board that has x16 link to the HMC or two x8 links? Why?

If you need additional buffer space, it is going to be better to use 2 x8 links rather than 2x16 links. However, keep in mind that each link requires a controller and that the controller will take up resources in the FPGA.

Can you provide some of your thoughts on routing with parts with different pitches?

-          Routing with Different Pitches:

  • A 1mm pitch part (when properly pinned out) should be able to break out transceivers on just 2 layers.  Each of these needs proper GND references and a lot of power planes. 8-12 layers required for the PCB depending on what else is happening on the board.
  • A 1mm pitch part (when properly pinned out) should be able to break out transceivers on just 2 layers.  Each of these needs proper GND references and a lot of power planes. 8-12 layers required for the PCB depending on what else is happening on the board.
  • A 0.65mm pitch part can be pinned out the same way as a 0.8mm pitch part.  The problem here is that many PCB manufacturers won’t let you go more than 12 layers (min required for this board) when you are using a 0.65mm pitch part). They have to use a small enough drill to connect the layers together that they have trouble hitting their target on more than ~12 layers.  At this point the board designer has to start planning for blind and buried vias
    • Note: The Quicksilver is only 12 layers and uses a 0.65mm pitch part without any exotic materials, so it can be done.

-          Cost:

  • In an engineer’s time, it doesn’t get expensive until you start throwing blind and buried vias into the equation.  These are not fun to keep track of.  It is really hard to put a tangible number on this.
  • In PCB cost, the general rule is “every extra layer pair costs an extra 10-15%”.  This means reducing to less than 1mm pitch adds 21-75% more cost to the PCB.
  • Adding blind/buried vias start at a ~40% adder on top of everything else.
  • Using laser vias (blind) instead of mechanically drilled vias is an extra 50% on top of everything else
  • Those numbers are just the beginning though.  The Colossus (850) is a 16 layer board.  All the doo-dads on that board pushed the cost to about a 550% increase over a standard 16 layer board. 
  • Something else that needs to be noted:  at 30Gbps, the PCB can’t be made out of standard FR-4, a more expensive, less lossy material needs to be used.  These materials start at about 3x the cost of standard FR-4.  So when you add all of these multipliers together, the PCB cost becomes a significantly more substantial cost
  • As for running at 15G instead of 30G – the channel loss tolerance is actually tuned for 30G and running at 15G doesn't gain that much.  There is less loss because of the lower speed, but there is less loss tolerance because the transceivers aren’t tuned to run at that speed. You might as well just use Gen2 @15G because you get 17dB of loss tolerance instead of 7dB.

 

 

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